A six-bit digital attenuator with low insertion loss was designed in a 0.25 μm GaAs p-HEMT process. The Pi-type attenuation structure and the T-type attenuation structure were cascaded to achieve low insertion loss and high attenuation accuracy. The phase shift compensation circuit was used to reduce the additional phase shift, and the amplitude compensation circuit was used to improve the attenuation accuracy. The simulation results showed that the RMS amplitude error was less than 0.5 dB, and the insertion loss was less than 5.6 dB in the range of 7~13 GHz. The input 1 dB compression point was about 29 dBm at 10 GHz, the additional phase shift was -7°~+6.5°, and the input/output return loss was less than -11 dB. The chip area was 2.50 mm×0.63 mm.