Contents
2024
Volume: 3 Issue 3
8 Article(s)
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Research Articles
Statistical evaluation of 571 GaAs quantum point contact transistors showing the 0.7 anomaly in quantized conductance using cryogenic on-chip multiplexing
Pengcheng Ma, Kaveh Delfanazari, Reuben K. Puddy, Jiahui Li, Moda Cao, Teng Yi, Jonathan P. Griffiths, Harvey E. Beere, David A. Ritchie, Michael J. Kelly, and Charles G. Smith
The mass production and the practical number of cryogenic quantum devices producible in a single chip are limited to the number of electrical contact pads and wiring of the cryostat or dilution refrigerator. It is, therefore, beneficial to contrast the measurements of hundreds of devices fabricated in a single chip in The mass production and the practical number of cryogenic quantum devices producible in a single chip are limited to the number of electrical contact pads and wiring of the cryostat or dilution refrigerator. It is, therefore, beneficial to contrast the measurements of hundreds of devices fabricated in a single chip in one cooldown process to promote the scalability, integrability, reliability, and reproducibility of quantum devices and to save evaluation time, cost and energy. Here, we used a cryogenic on-chip multiplexer architecture and investigated the statistics of the 0.7 anomaly observed on the first three plateaus of the quantized conductance of semiconductor quantum point contact (QPC) transistors. Our single chips contain 256 split gate field-effect QPC transistors (QFET) each, with two 16-branch multiplexed source-drain and gate pads, allowing individual transistors to be selected, addressed and controlled through an electrostatic gate voltage process. A total of 1280 quantum transistors with nano-scale dimensions are patterned in 5 different chips of GaAs heterostructures. From the measurements of 571 functioning QFETs taken at temperatures T = 1.4 K and T = 40 mK, it is found that the spontaneous polarisation model and Kondo effect do not fit our results. Furthermore, some of the features in our data largely agreed with van Hove model with short-range interactions. Our approach provides further insight into the quantum mechanical properties and microscopic origin of the 0.7 anomaly in QFETs, paving the way for the development of semiconducting quantum circuits and integrated cryogenic electronics, for scalable quantum logic control, readout, synthesis, and processing applications..
Chip
- Publication Date: Sep. 01, 2024
- Vol. 3, Issue 3, 100095 (2024)
Measurement of cryoelectronics heating using a local quantum dot thermometer in silicon
Mathieu de Kruijf, Grayson M. Noah, Alberto Gomez-Saiz, John J.L. Morton, and M. Fernando Gonzalez-Zalba
Silicon technology offers the enticing opportunity for monolithic integration of quantum and classical electronic circuits. However, the power consumption levels of classical electronics may compromise the local chip temperature and hence affect the fidelity of qubit operations. In the current work, a quantum-dot-basedSilicon technology offers the enticing opportunity for monolithic integration of quantum and classical electronic circuits. However, the power consumption levels of classical electronics may compromise the local chip temperature and hence affect the fidelity of qubit operations. In the current work, a quantum-dot-based thermometer embedded in an industry-standard silicon field-effect transistor (FET) was adopted to assess the local temperature increase produced by an active FET placed in close proximity. The impact of both static and dynamic operation regimes was thoroughly investigated. When the FET was operated statically, a power budget of 45 nW at 100-nm separation was found, whereas at 216 μm, the power budget was raised to 150 μW. Negligible temperature increase for the switch frequencies tested up to 10 MHz was observed when operating dynamically. The current work introduced a method to accurately map out the available power budget at a distance from a solid-state quantum processor, and indicated the possible conditions under which cryoelectronics circuits may allow the operation of hybrid quantum–classical systems..
Chip
- Publication Date: Sep. 01, 2024
- Vol. 3, Issue 3, 100097 (2024)
Channel-bias-controlled reconfigurable silicon nanowire transistors via an asymmetric electrode contact strategy
Wentao Qian, Junzhuan Wang, Jun Xu, and Linwei Yu
Reconfigurable field-effect transistors (R-FETs) that can dynamically reconfigure the transistor polarity, from n-type to p-type channel or vice versa, represent a promising new approach to reduce the logic complexity and granularity of programmable electronics. Although R-FETs have been successfully demonstrated upon Reconfigurable field-effect transistors (R-FETs) that can dynamically reconfigure the transistor polarity, from n-type to p-type channel or vice versa, represent a promising new approach to reduce the logic complexity and granularity of programmable electronics. Although R-FETs have been successfully demonstrated upon silicon nanowire (SiNW) channels, a pair of extra program gates is still needed to control the source/drain (S/D) contacts. In this work, we propose a rather simple single gate R-FET structure with an asymmetric S/D electrode contact, where the FET channel polarity can be altered by changing the sign of channel bias Vds. These R-FETs were fabricated upon an orderly array of planar SiNW channels, grown via in-plane solid-liquid-solid mechanism, and contacted by Ti/Al and Pt/Au at the S/D electrodes, respectively. Remarkably, this channel-bias-controlled R-FET strategy has been successfully testified and implemented upon both p-type-doped (with indium dopants) or n-type-doped (phosphorus) SiNW channels, whereas the R-FET prototypes demonstrate an impressive high Ion/off ratio of > 106 and a steep subthreshold swing of 79 mV/dec. These results indicate a rather simple, compact and generic enough R-FET strategy for the construction of a new generation of SiNW-based programmable and low-power electronics..
Chip
- Publication Date: Sep. 01, 2024
- Vol. 3, Issue 3, 100098 (2024)
Remote electric powering by germanium photovoltaic conversion of an Erbium-fiber laser beam
Richard Soref, Francesco De Leonardis, Oussama Moutanabbir, and Gerard Daligou
The commercially available 4000-Watt continuous-wave (CW) Erbium-doped-fiber laser, emitting at the 1567-nm wavelength where the atmosphere has high transmission, provides an opportunity for harvesting electric power at remote “off the grid” locations using a multi-module photovoltaic (PV) “receiver” panel. This paper The commercially available 4000-Watt continuous-wave (CW) Erbium-doped-fiber laser, emitting at the 1567-nm wavelength where the atmosphere has high transmission, provides an opportunity for harvesting electric power at remote “off the grid” locations using a multi-module photovoltaic (PV) “receiver” panel. This paper proposes a 32-element monocrystalline thick-layer Germanium PV panel for efficient harvesting of a collimated 1.13-m-diam beam. The 0.78-m2 PV panel is constructed from commercial Ge wafers. For incident CW laser-beam power in the 4000 to 10,000 W range, our thermal, electrical, and infrared simulations predict 660 to 1510 Watts of electrical output at the panel temperatures of 350 to 423 K..
Chip
- Publication Date: Sep. 01, 2024
- Vol. 3, Issue 3, 100099 (2024)
Challenges and recent advances in HfO2-based ferroelectric films for non-volatile memory applications
Ming-Hao Shao, Rui-Ting Zhao, Houfang Liu, Wen-Jia Xu, Yi-Da Guo, Da-Peng Huang, Yu-Zhe Yang, Xin-Ru Li, Wancheng Shao, Peng-Hui Shen, Junwei Liu, Kuanmao Wang, Jinguo Zheng, Zhao-Yi Yan, Jian-Lan Yan, Tian Lu, Yi Yang, and Tian-Ling Ren
The emergence of data-centric applications such as artificial intelligence (AI), machine learning, and the Internet of Things (IoT), has promoted surges in demand for storage memories with high operating speed and nonvolatile characteristics. HfO2-based ferroelectric memory technologies, which emerge as a promising altThe emergence of data-centric applications such as artificial intelligence (AI), machine learning, and the Internet of Things (IoT), has promoted surges in demand for storage memories with high operating speed and nonvolatile characteristics. HfO2-based ferroelectric memory technologies, which emerge as a promising alternative, have attracted considerable attention due to their high performance, energy efficiency, and full compatibility with the standard complementary metal-oxide-semiconductors (CMOS) process. These nonvolatile storage elements, such as ferroelectric random access memory (FeRAM), ferroelectric field-effect transistors (FeFETs), and ferroelectric tunnel junctions (FTJs), possess different data access mechanisms, individual merits, and specific application boundaries in next-generation memories or even beyond von Neumann architecture. This paper provides an overview of ferroelectric HfO2 memory technologies, addresses the current challenges, and offers insights into future research directions and prospects..
Chip
- Publication Date: Sep. 01, 2024
- Vol. 3, Issue 3, 100101 (2024)
Suspended nanomembrane silicon photonic integrated circuits
Rongxiang Guo, Qiyue Lang, Zunyue Zhang, Haofeng Hu, Tiegen Liu, Jiaqi Wang, and Zhenzhou Cheng
Leveraging the low linear and nonlinear absorption loss of silicon at mid-infrared (mid-IR) wavelengths, silicon photonic integrated circuits (PICs) have attracted significant attention for mid-IR applications including optical sensing, spectroscopy, and nonlinear optics. However, mid-IR silicon PICs typically show modLeveraging the low linear and nonlinear absorption loss of silicon at mid-infrared (mid-IR) wavelengths, silicon photonic integrated circuits (PICs) have attracted significant attention for mid-IR applications including optical sensing, spectroscopy, and nonlinear optics. However, mid-IR silicon PICs typically show moderate performance compared to state-of-the-art silicon photonic devices operating in the telecommunication band. Here, we proposed and demonstrated suspended nanomembrane silicon (SNS) PICs with light-guiding within deep-subwavelength waveguide thickness for operation in the short-wavelength mid-IR region. We demonstrated key building components, namely, grating couplers, waveguide arrays, micro-resonators, etc., which exhibit excellent performances in bandwidths, back reflections, quality factors, and fabrication tolerance. Moreover, the results show that the proposed SNS PICs have high compatibility with the multi-project wafer foundry services. Our study provides an unprecedented platform for mid-IR integrated photonics and applications..
Chip
- Publication Date: Sep. 01, 2024
- Vol. 3, Issue 3, 100104 (2024)
Electrical performance and reliability analysis of vertical gallium nitride Schottky barrier diodes with dual-ion implanted edge termination
Bo Li, Jinpei Lin, Linfei Gao, Zhengweng Ma, Huakai Yang, Zhihao Wu, Hsien-Chin Chiu, Hao-Chung Kuo, Chunfu Zhang, Zhihong Liu, Shuangwu Huang, Wei He, and Xinke Liu
In this study, a gallium nitride (GaN) substrate and its 15 μm epitaxial layer were entirely grown by adopting the hydride vapor phase epitaxy (HVPE) technique. To enhance the breakdown voltage (VBR) of vertical GaN-on-GaN Schottky barrier diodes (SBDs), a dual ion coimplantation of carbon and helium was employed to crIn this study, a gallium nitride (GaN) substrate and its 15 μm epitaxial layer were entirely grown by adopting the hydride vapor phase epitaxy (HVPE) technique. To enhance the breakdown voltage (VBR) of vertical GaN-on-GaN Schottky barrier diodes (SBDs), a dual ion coimplantation of carbon and helium was employed to create the edge termination. The resulting devices exhibited a low turn-on voltage of 0.55 V, a high Ion/Ioff ratio of approximately 109, and a low specific on-resistance of 1.93 mΩ cm2. When the ion implantation edge was terminated, the maximum VBR of the devices reached 1575 V, with an average improvement of 126%. These devices demonstrated a high figure of merit (FOM) of 1.28 GW cm–2 and showed excellent reliability during pulse stress testing..
Chip
- Publication Date: Sep. 01, 2024
- Vol. 3, Issue 3, 100105 (2024)
Highly sensitive diamond X-ray detector array for high-temperature applications
Wenjie Dou, Chaonan Lin, Wei Fan, Xun Yang, Chao Fang, Huaping Zang, Shaoyi Wang, Congxu Zhu, Zhi Zheng, Weimin Zhou, and Chongxin Shan
Diamond is a highly suitable material for X-ray detectors that can function effectively in harsh environments due to its unique properties such as ultrawide bandgap, high radiation resistance, excellent carrier mobility as well as remarkable chemical and thermal stability. However, the sensitivity of diamond X-ray deteDiamond is a highly suitable material for X-ray detectors that can function effectively in harsh environments due to its unique properties such as ultrawide bandgap, high radiation resistance, excellent carrier mobility as well as remarkable chemical and thermal stability. However, the sensitivity of diamond X-ray detectors needs further improvement due to the relatively low X-ray absorption efficiency of diamond, and the exploration of single-crystal diamond array imaging still remains unexplored. In the current work, a 10 × 10 X-ray photodetector array was constructed from single-crystal diamond. To improve the sensitivity of the diamond X-ray detector, an asymmetric sandwich electrode structure was utilized. Additionally, trenches were created through laser cutting to prevent crosstalk between adjacent pixels. The diamond X-ray detector array exhibits exceptional performance, including a low detection limit of 4.9 nGy s-1, a sensitivity of 14.3 mC Gy-1 cm-2, and a light-dark current ratio of 18,312, which are among the most favorable values ever reported for diamond X-ray detectors. Furthermore, these diamond X-ray detectors can operate at high temperatures up to 450 °C, making them suitable for development in harsh environments..
Chip
- Publication Date: Sep. 01, 2024
- Vol. 3, Issue 3, 100106 (2024)
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