Phase-locking-free all-optical matching system for 100 Gbaud QPSK optical signal
  • photonics1
  • Dec. 27, 2024

Abstract

 

Photonic firewall is a monitoring protection device that will directly detect and locate optical network attacks at the optical layer, which can effectively ensure the security of optical networks. An all-optical matching system is the core part of photonic firewall, which determines the performance of a photonic firewall, so it is of great significance to research and develop all-optical matching system for high-speed and high-order modulation formats signals. At present, an all-optical matching system for binary modulation formats is relatively mature, but the all-optical matching system for high-order phase modulation format signals is still limited by how to solve the problem of phase synchronization. In this paper, a new all-optical matching system based on self-interference matching is proposed for quadrature phase shift keying (QPSK) optical signal, which avoids the introduction of local target sequence optical signals and phase-locking circuits. The theoretical analysis and simulation verification are conducted for the designed system. The results demonstrate that the system can accurately identify and locate 4-symbol or 8-symbol target sequences in the input QPSK optical signals with 16-symbol and 32-symbol data sequences at a data rate of 100 Gbaud.

 

© 2024 Optica Publishing Group under the terms of the Optica Open Access Publishing Agreement

1. Introduction

The advent of technologies such as 5G, optical data center interconnects [1], and edge computing [2] has led to an escalating demand for high-speed, large-capacity, and broad-bandwidth optical communication networks. However, as the volume of data information transported by optical networks exponentially increases, the security of optical networks becomes a pressing concern. Currently, the methods of attacks on optical networks are highly sophisticated, primarily including optical eavesdropping and active optical attacks [3]. Optical eavesdropping is achieved through the covert destruction of optical fibers or cables and thus drawing out optical signals [4]. Active optical attacks are executed by introducing signals that disrupt communication quality and potentially result in service interruptions [5]. Attacks on optical networks can lead to extensive network paralysis and data leakage, posing a serious threat to public and national information security. Consequently, numerous scholars have dedicated their research to the advancement of optical network security technology. At present, a myriad of protection measures or devices exist, including optical code division multiple access (OCDMA) [6], quantum secure communication [7], chaotic optical communication [8], and photonic firewall [911]. Among these, photonic firewall can directly realize the monitoring and locating of optical attacks at the optical layer.

As the main information filtering device of router front-end, photonic firewall is capable of performing security monitoring at the optical layer with line speed for signals entering and exiting the network, discriminating and processing the invading attack signals. Compared to electronic firewall, it can directly process optical signals and avoid the photoelectric conversion of optical signals, which has higher processing rate and lower loss. The project of the European Union named Wirespeed Security Domains using Optical Monitoring (WISDOM) first developed a photonic firewall in 2006, targeted at on-off keying (OOK) modulation signals [9]. However, with technological advancement, high-order phase modulation formats like QPSK and 16-quadrature amplitude modulation (16QAM) are now widely used in optical communication networks. Therefore, there is a need to research new types of photonic firewalls that can handle high-order phase modulation formats signals and process at faster speeds for using in existing optical communication networks.

All-optical matching system is the core component of the photonic firewall and determines its performance. It is used to recognize optical signals’ sequence information at the optical layer, capable of identifying whether there is a specific sequence in the input optical signal and outputting the position of the sequence. To render photonic firewalls viable for contemporary optical networks, it is imperative to advance research and development of all-optical matching systems capable of handling higher speed and high-order modulation formats signals. In 2009, Webb et al. first proposed a serial cyclical matching structure composed of XNOR gate, AND gate and regenerator, and achieved binary modulated signals matching at 42 Gbps [10]. Most of the following scholars continue their research work on this structure. In 2021, Tang et al. designed an all-optical matching system for 100 Gbps and 200 Gbps OOK signals based with logic gates using high nonlinear fiber (HNLF) [12]. In the same year, Shi et al. designed an all-optical matching system that can process 100 Gbps OOK or BPSK signals [13]. In 2023, Tang et al. proposed a method based on phase-sensitive amplification (PSA) in HNLF, achieving an all-optical matching system that can handle 100 Gbps BPSK and 100 Gbaud QPSK signals [14]. In [15], Shi et al. proposed an all-optical matching system oriented to multi-order modulation formats, and the structure can achieve all-optical matching of 100 Gbaud optical signals in BPSK, QPSK, 8PSK and 16QAM modulation formats and has good anti-noise performance. However, such serial structures all require the introduction of local target sequence optical signals for matching, and when facing phase modulation formats, phase synchronization between the input optical signals and local target sequence optical signals must be resolved, ensuring the right interference processing in the system. No practical solutions for this issue were provided in [1315]. Liu et al. proposed a phase-locking-free self-interference matching method in [16], achieving all-optical matching for 100 Gbps BPSK signals. Meanwhile, Zhang et al. achieved an all-optical matching system for 100 Gbaud QPSK signals in 2023 using a phase-locking method based on phase-insensitive amplification (PIA). In this work, QPSK signal was divided into I and Q branches for matching separately, but the two-path phase-locking circuits and matching modules lead to a high complexity of the overall system [17].

This paper proposes a phase-locking-free all-optical matching system for QPSK optical signal. Based on the four-wave mixing (FWM) effect of HNLF, the squarer with phase doubling function and the negator with phase negation function are realized. The input QPSK optical signal passes through the phase processing module composed of squarers and negators to obtain the processed pending interference signals. Then these signals pass through the symbol matching module to obtain the symbol matching results of the input QPSK optical signal. In the process of symbol matching, there is no need to introduce the local target sequence optical signals, thus avoiding the problem of phase locking. 41 optical switches are used to set the symbols of the target sequence, and symbol matching signals are integrated by an AND gates array to output the final matching result. In this work, a simulation platform based on VPItransmissionMaker 8.5 was built and the feasibility of the scheme was verified. The system can accurately achieve the matching and positioning of 4-symbol target sequences and 8-symbol target sequences in the input QPSK optical signals with 16-symbol and 32-symbol data sequences at a data rate of 100 Gbaud.

The rest of this paper is organized as follows. In Section 2, the principles of the designed system are introduced, including the function and principles of each module. Section 3 presents the simulation platform built on VPItransmissionMaker 8.5 and the parameters settings of the simulation. In Section 4, the results of the simulations are analyzed and discussed, evaluating the performances of the proposed all-optical matching system. Finally, Section 5 summarizes the work and significance of this paper.

2. Principle of operation

This section first elaborates on the principles of squarer and negator, followed by an introduction to the optical logic gates used in the designed system. Finally, it describes the principle of the designed phase-locking-free all-optical matching system for QPSK optical signal.

2.1 Phase processing module: squarers and negators

The input QPSK optical signal is firstly pre-processed by the phase processing module, the core components of which include squarers and negators, both having the same structure as shown in Fig. 1. This structure consists of a continuous-wave (CW) source, a multiplexer, a section of HNLF, an optical bandpass filter (OBPF) and an erbium-doped fiber amplifier (EDFA). The input QPSK optical signal and the CW are multiplexed and then input into the HNLF, where FWM occurs to generate idler light, as shown in Fig. 2. By setting different OBPF’s center frequencies, the corresponding idler light outputs. In the output of the squarer, the initial phase of each symbol will become twice that of the initial phase of corresponding symbol in the input QPSK optical signal, achieving phase doubling; while in the output of the negator, the initial phase of each symbol becomes negative of the initial phase of corresponding symbol in the input QPSK optical signal.

 figure: Fig. 1.

Fig. 1. The structure of squarer and negator.

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 figure: Fig. 2.

Fig. 2. The principle of squarer and negator.

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The above two components are realized based on the phase-insensitive FWM of the HNLF. In the squarer and negator, the input QPSK optical signal and the CW input as pump light. When they propagate in the HNLF, the two beams will continuously beat with each other, thus generating new light at other frequencies, namely idler light [18]. Figure 2 shows the relationship between two idler light and the two beams of pump light. Assuming that the frequencies of the input QPSK optical signal and the CW are ωs and ωc respectively, the idler light near the input QPSK optical signal side is idler1, whose frequency is ωi1, and the idler light near the CW side is idler2, whose frequency is ωi2. The frequencies of four beams satisfy Eq. (1), which illustrates that the process satisfies the energy conservation law. That is, ωi1=2ωsωc, and ωi2=2ωcωs.

ωi1+ωi2=ωs+ωc

 

For a more pronounced FWM effect to occur in the HNLF, the quasi-phase matching condition is required as shown in Eq. (2) [19]. In Eq. (2), Δω=ωs+ωcωi1ωi2, combined with Eq. (1), it can be obtained that Δω=0. Therefore, it is necessary to guarantee the wave vector matching factor Δβ tends to 0, thereby increasing the efficiency of FWM.

ΔΦ=Δωt+Δβr0

 

The propagation constants of the input QPSK optical signal, the CW, idler1 and idler2 are denoted by βs, βc, βi1 and βi2, respectively. For idler1, when the wave vector matching condition is satisfied, Δβ=2βsβcβi1. That is, the phase of idler1 satisfies θi1=2θsθc. Similarly, the phase of idler2 satisfies θi2=2θcθs.

Assuming that the power of the input QPSK optical signal and the CW are denoted by Ps and Pc respectively, while the power of idler1 and idler2 are denoted by Pi1 and Pi2. By solving the coupled wave equations of FWM in the HNLF, the expressions for the power and phase of idler light can be obtained. When the polarization directions of the four beams are the same, elliptic integral of the first kind F, elliptic integral of the third kind and the Jacobian elliptic function sn can be used to analytically express them. Taking idler1 as an example, its power and phase can be expressed by Eq. (3) and Eq. (4) [19].

Pi1=η1+η2η11η×sn2(zγZ0Zc,k)
θi1=2θsθc+Δφ=2θsθc+(2Ps+2Pc+η1S2)γz+Zc(η2η1)2×{Π[η,sin1?(sn(uz,k)),k]Π[η,sin1?(sn(u0,k)),k]}

 

In Eq. (3) and Eq. (4), γ and z are the nonlinear coefficient and length of the HNLF. Δφ is the phase rotation generated in the FWM process. {η1,η2,η3,η4} are the four roots obtained by solving Eq. (5) [19]. The other parameters in Eq. (3) and Eq. (4) can be described as Eq. (6) to Eq. (12) [19]. In the same way, the power and phase of idler2 can also be derived from this by simply swapping Ps and Pc and using Δβi2 instead of Δβi1.

h(x)=(Ps2x)2(Pc+x)x14(Sx3x2)2=0
S=Δβ1/γ+2PsPc
η=(η3η2)/(η3η1)
k=η(η4η1)/(η4η2)
Zc=1/7(η3η1)(η4η2)/4
Z0=Zc×F(sin1?(η2/ηη1),k)
uz=(γzZ0)/Zc
u0=Z0/Zc

 

According to Eq. (4), it can be found that phase rotation Δφ is only related to the power of the input QPSK optical signal and the CW, but not to their phases. So when the power of these two inputs is constant, Δφ is a constant value. It can be eliminated by increasing the phase shift at the output port or adding a phase shift to the CW. By doing these, it could achieve θi1=2θs and θi2=θs, which implies that the squarer and negator’s function are achieved. After adjusting the parameters of CW, when the power of the input QPSK signal light is fixed, both the squarer and the negator can correctly perform their functions, even if the phase of the QPSK signal changes.

Analyzing the output of the squarer and negator in the time domain, the following phenomenon can be observed. In the output of the squarer, each symbol’s power is constant, but the phase changes. Within the unit symbol time, the initial phase of the symbol is 2 times of the corresponding symbol in the input QSPK optical signal, and the phase changes periodically continuously with change rate as k1. For the output of the negator, its each symbol’s power is constant, too. Within the unit symbol time, the initial phase of the symbol is negative value of the corresponding symbol in the input QSPK optical signal, and the phase changes periodically with change rate as k2. The values of k1 and k2 are related to the frequency difference between the input QPSK optical signal and the CW, as well as the phase change rate k0 of the input QSPK optical signal.

2.2 Optical logic gates: NOT and AND

All-optical NOT gates [20] and AND gates implemented based on the HNLF are required in the designed all-optical matching system to process the amplitude logic operation of signals. Figure 3 and Fig. 4 show the structures of these two kinds of logic gates. The center frequency of the two inputs for each logic gate are not identical, thus avoiding the influence of phase interference. When one input of the AND gate is a CW with constant power, the function of wavelength conversion can also be realized.

 figure: Fig. 3.

Fig. 3. The structure of NOT gate.

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 figure: Fig. 4.

Fig. 4. The structure of AND gate.

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2.3 Phase-locking-free all-optical matching system for QPSK optical signal

As shown in Fig. 5, this is a phase-locking-free all-optical matching system for QPSK optical signal that does not require the introduction of a local signal containing target sequence information. In explaining the principle, we assume that the four initial phases of the used QPSK symbols are {0,π2,π,3π2}. The data sequence in the input QPSK optical signal’s length M=8 and each symbol’s initial phase set as {0,π2,3π2,π,0,3π2,π,π2}, where each symbol’s duration is T. The target sequence length N=4, and its symbols have initial phases of {0,3π2,π,π2}. In this system, based on the symbol order of the target sequence, N 41 optical switches are set sequentially, controlling the outputs for corresponding symbol matching results. The principle and process of this system are described below.

 figure: Fig. 5.

Fig. 5. The structure of phase-locking-free all-optical matching system.

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First, the input QPSK optical signal is split into two identical signals using a 12 power splitter. One signal is input into cascaded squarers, doubling the symbols’ phases twice, resulting in a signal with each symbol’s initial phase as {0,0,0,0,0,0,0,0}. The other signal is input into cascaded negators, negating the symbols’ phases twice, resulting in a signal with each symbol’s initial phase identical to the input QPSK optical signal, that is {0,π2,3π2,π,0,3π2,π,π2}. Figure 6 shows the change of symbols’ initial phase after cascaded squarers and cascaded negators.

 figure: Fig. 6.

Fig. 6. The change of symbols’ initial phase after cascaded squarers and cascaded negators, (a) The change of symbols’ initial phase after cascaded squarers, (b) The change of symbols’ initial phase after cascaded negators.

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Section 2.1 introduces the principles of the squarer and negator, revealing that both components have identical structures, differing only in the center frequency of the CW and the OBPF. The purpose of using cascaded negators in the system is to offset the phase change rate impact of the signal caused by cascaded squarers. By appropriately adjusting the center frequency of the CWs and the OBPFs used in the squarers and negators, the outputs of the cascaded squarers and cascaded negators could have the same center frequency and phase change rate, providing the conditions necessary for interference. Figure 7 shows the center frequency settings for this part. By setting the center frequency in this way, if the phase change rate of each symbol in the signal output by the cascaded squarers is k1, the phase change rate of each symbol in the signal output by the cascaded negators is also k1. When the initial phase difference of two symbols is 0, due to the same phase change rate, the phase difference within the symbol period always remains at 0. Similarly, when the initial phase difference of two symbols is π2, π or 3π2, the phase difference within the symbol period always remains at π2, π or 3π2. It allows for correct signal interference to occur in the multiplexers.

 figure: Fig. 7.

Fig. 7. The center frequency settings for the CWs and the OBPFs in cascaded squarers and cascaded negators, (a) Cascaded squarers, (b) Cascaded negators.

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Next, phase shifting is performed on the two signals outputted after phase processing, serving as the signals for interference in the four multiplexers MUX1, MUX2, MUX3 and MUX4. The output of the cascaded squarers passes through a 12 power splitter, divided into two identical signals. One signal serves as the signal for interference in MUX1, with each symbol’s initial phase as {0,0,0,0,0,0,0,0}, while the other signal passes through a 90° phase shifter, resulting in a signal with each symbol’s initial phase as {π2,π2,π2,π2,π2,π2,π2,π2}. The output of the first 90° phase shifter, after passing through a 12 power splitter, is divided into two identical signals. One signal serves as the signal for interference in MUX2, and the other signal passes through a 90° phase shifter, resulting in a signal with each symbol’s initial phase as {π,π,π,π,π,π,π,π}. The output of the second 90° phase shifter, after passing through a 12 power splitter, is divided into two identical signals, too. One signal serves as the signal for interference in MUX3, and the other signal passes through a 90° phase shifter, resulting in a signal with each symbol’s initial phase as {3π2,3π2,3π2,3π2,3π2,3π2,3π2,3π2}, serving as the signal for interference in MUX4.

The output of the cascaded negators undergoes 180° phase shifting, then a signal with each symbols’ phase inverse to those of the input QPSK optical signal could be obtained, which is {π,3π2,π2,0,π,π2,0,3π2}. A 14 power splitter is used to divide this signal into four identical signals, each serving as the signal for interference in MUX1, MUX2, MUX3, and MUX4 respectively.

The sequences carried by the two input signals of MUX1 are {0,0,0,0,0,0,0,0} and {π,3π2,π2,0,π,π2,0,3π2}. The sequences carried by the two input signals of MUX2 are {π2,π2,π2,π2,π2,π2,π2,π2} and {π,3π2,π2,0,π,π2,0,3π2}. The sequences carried by the two input signals of MUX3 are {π,π,π,π,π,π,π,π} and {π,3π2,π2,0,π,π2,0,3π2}. The sequences carried by the two input signals of MUX4 are {3π2,3π2,3π2,3π2,3π2,3π2,3π2,3π2} and {π,3π2,π2,0,π,π2,0,3π2}. It is necessary to ensure that the amplitude of these eight interference signals is the same. Assuming that the amplitude is A, with power P=A2, the power of the output signal after interference is as Table 1.

Tables Icon

Table 1. The output power for two symbols with different phase differences after interference.

When the phase difference between the two interfering symbols is consistently 0, constructive interference occurs, the power of the output signal is 4P. When the phase difference remains at π2, the power of the output signal is 2P. However, when two symbols with a phase difference of π, destructive interference takes place, leading to output zero power. Since the output of the cascaded negators is phase-shifted by 180°, the phase of each symbol is the inverse of the input QPSK optical signal’s symbols. That is, in the outputs of MUX1, MUX2, MUX3 and MUX4, the symbol with zero power corresponds to the symbol which initial phase is {0}, {π2}, {π} and {3π2} in the data sequence separately, while other mismatched symbols will have pulses which power is 2P or 4P. For MUX1, its output signal’s each symbol’s power is {0,2P,2P,4P,0,2P,4P,2P}, where positions with zero power match symbols with initial phase of {0} in the data sequence, and mismatched symbols exhibit pulses of 2P or 4P. For MUX2, its output signal’s each symbol’s power is {2P,0,4P,2P,2P,4P,2P,0}, where positions with zero power match symbols with an initial phase of {π2} in the data sequence, and mismatched symbols have pulses which power is 2P or 4P. For MUX3, its output signal’s each symbol’s power is {4P,2P,2P,0,4P,2P,0,2P}, where positions with zero power correspond to symbols with an initial phase of {π} in the data sequence, and mismatched symbols exhibit pulses which power is 2P or 4P. For MUX4, output signal’s each symbol’s is {2P,4P,0,2P,2P,0,2P,4P}, where positions with zero power match symbols with an initial phase of {3π2} in the data sequence, and mismatched symbols have pulses which power is 2P or 4P.

To eliminate the impact of significant power differences at mismatched positions, the signals output by four multiplexers are amplified to appropriate power using EDFAs and then input into NOT gates. The NOT gates suppress the mismatched positions which have high power, output the signal which power is 0 or close to 0, while positions initially with zero power output high power pulses. In the output signal of the NOT gates, the pulses with high power are represented as "1", and the pulses which power are 0 or close to 0 are represented as "0". The symbols’ power of the output signal by NOT1 are {1,0,0,0,1,0,0,0}. The symbols’ power of the output signal by NOT2 are {0,1,0,0,0,0,0,1}. The symbols’ power of the output signal by NOT3 are {0,0,0,1,0,0,1,0}. The symbols’ power of the output signal by NOT4 are {0,0,1,0,0,1,0,0}. The outputs of the NOT gates serve as the symbols matching results of the input QPSK optical signal, with NOT1, NOT2, NOT3, and NOT4’s outputs corresponding to the matching results for the symbols with initial phases {0}, {π2}, {π} and {3π2} respectively. Figure 8 is the schematic diagram of signal changes, shows the process of the input QPSK optical signal after phase processing, interference and NOT gates to obtain the symbol matching results.

 figure: Fig. 8.

Fig. 8. The schematic diagram of signal changes.

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The outputs of the four NOT gates serve as the output of the symbol matching module and then input to the target setting module. The 14 power splitters are used to split the outputs of the four NOT gates separately and then connected to N 41 optical switches, which are used to set the target sequence. For each 41 optical switch, its four inputs connected to the outputs of NOT1, NOT2, NOT3 and NOT4 respectively, corresponding to the symbol matching results of the four kind of symbols in the input QPSK optical signal. If the control method of the 41 optical switches is two-bit high and low levels as {00,01,10,11}, making {00} correspond to the symbol matching result of the symbol whose initial phase is {0}, {01} corresponded to the symbol whose initial phase is {π2}, {10} corresponded to the symbol whose initial phase is {π}, {11} corresponded to the symbol whose initial phase is {3π2}. Following the length of the target sequence and the order of symbols within the sequence, the control voltages of N 41 optical switches are sequentially set. The outputs of the N 41 optical switches need to undergo delays {(N1)T,(N2)T,,T,0} according to the symbol order in the target sequence, serving as the symbol matching signals for AND gates array.

The N delayed symbol matching signals output from the target setting module input to the AND gates array. The role of the AND gates array is to perform logical AND operations on all delayed symbol matching signals, as shown in Fig. 9. As each AND gate have only two inputs, they are presented in an array form, consisting of log2N layers of gates, with the number of gates in each layer being half of the previous layer, the number of gates in the ith layer is N/2i. The first layer comprises N/2 AND gates, where the N delayed symbol matching signals are sequentially performed AND operation in pairs. The N/2 signals output by the first layer input to the N/4 gates in the second layer, and so on, until the single AND gate of the last layer outputs the matching results of the target sequence to the data sequence in the input QPSK optical signal. If the number of inputs of the first layer AND gates is N=2k+1,kZ+, the first layer AND gates consists of (k+1) AND gates. As shown in Fig. 10, the last AND gate has two inputs: the symbol matching signal which delayed of 0 and an initialing pulse. Similarly, if the number of inputs of the ith layer AND gates is odd, the correct calculation of the AND gates array can also be achieved by adding an initialing pulse. In the example given, with N=4, two layers of AND gates array are needed. The first layer consists of two AND gates, and the second layer has one gate. The output signal of the second layer is the matching result between the 4-symbol target sequence to the 8-symbol data sequence in the input QPSK optical signal. If there are no high-level pulses in the output signal, it indicates that the data sequence does not contain the target sequence. If there are high-level pulses present, the position of the pulses corresponds to the position of the last symbol of the target sequence in the data sequence, and the number of pulses indicates the number of the target sequence in the data sequence. It’s worth noting that this system is also applicable to QPSK signals with four kinds of symbols’ phases setting as {π4,3π4,5π4,7π4}. It only requires setting the phase shifter after the cascaded negators to a phase shift of −45°, as shown in Fig. 11. The outputs of the four NOT gates correspond to the matching results for the four symbols. The subsequent AND logic calculations are consistent with the above example and are not detailed here.

 figure: Fig. 9.

Fig. 9. The function of AND gates array.

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 figure: Fig. 10.

Fig. 10. The inputs to the first layer AND gates when the number of symbols in the target sequence is odd (N=2k+1,kZ+).

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 figure: Fig. 11.

Fig. 11. The process of phase processing and symbol matching for QPSK signal setting symbols by {π4,3π4,5π4,7π4}.

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3. Simulation platform

In this work, VPItransmissionMaker 8.5 was used to perform simulation verification of the designed phase-locking-free all-optical matching system for QPSK optical signal. We have investigated the current research status of single-wavelength QPSK transmission systems. In 2023, Almonacil et al. achieved a 260 Gbaud dual-polarization (DP) QPSK single-carrier transmission system [21], which is currently the highest baud rate transmission system realized. Considering the bandwidth of the electro-optic modulators [22] and photodetectors [23] used in this system, we set the baud rate of the QPSK signal in our simulation to 100 Gbaud. The simulation implemented all-optical matching of 100 Gbaud QPSK signals, enabling accurate identification of either 4-symbol target sequences or 8-symbol target sequences within 16-symbol and 32-symbol data sequences. Figure 12 illustrates the simulation platform built in VPItransmissionMaker 8.5 (taking the system for 4-symbol target sequence as an example), while Table 2 presents the parameters settings of various modules in the simulation.

 figure: Fig. 12.

Fig. 12. The simulation platform of the phase-locking-free all-optical matching system for QPSK optical signal in VPItransmissionMaker 8.5.

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Tables Icon

Table 2. The parameters of modules used in simulation.

As shown in Table 2, the parameters of some modules used in the simulation are detailed. In VPItransmissionMaker 8.5, an ideal modulation module was used to generate a power-constant 100 Gbaud QPSK signal with four types of phases: {0,π2,π,3π2}. This signal was split into two completely identical signals using a 12 power splitter, then these two signals input into cascaded squarers and cascaded phase negators respectively. When implementing power splitting based on the fork component in VPItransmissionMaker 8.5, both power and phase remain unchanged. In practical applications, the power splitter could be combined with amplifiers, phase shifters, or other components.

Cascaded squarers: In VPItransmissionMaker 8.5, the LaserCW module works as the source to emit CW. The power of the first squarer’s CW was set at 70mW with center frequency of 193.4THz. The OBPF’s center frequency was set to 192.8THz to output the signal after first phase doubling. The output of the first squarer was amplified to 1mW using an EDFA with a gain coefficient of 17.6dB before entering the second squarer. The power of the second squarer’s CW was set at 70mW with a center frequency of 192.5THz. The OBPF’s center frequency was set to 193.1THz to output the second signal after doubling of the phase. After passing through the cascaded squarers, the output signal had a center frequency of 193.1THz, and the initial phase of all symbols became {0}.

Cascaded negators: The power of the first negator’s CW was set at 70mW with center frequency of 193.4THz. The OBPF’s center frequency was set to 193.7THz to output the signal after first negativity of the phase. The output of the first negator was amplified to 1mW using an EDFA with a gain of 23.1dB before entering the second negator. The power of the second negator’s CW was set at 70mW with center frequency of 193.4THz. The OBPF’s center frequency was set to 193.1THz to output the signal after the second negativity of the phase. After passing through the cascaded negators, the output signal’s center frequency was at 193.1THz, and the initial phase of all symbols were same as the input QPSK optical signal. By passing through an EDFA of 5.2dB, the power of the output signal remained consistent with that of the output of cascaded squarers. Due to structural consistency, the two output signals have the same rate of phase change in each unit symbol time, that is, the phase difference is constant.

Multiplexers: Processing the output of the cascaded squarers multiple times with 12 power splitting and 90° phase shifting yields four signals for interference. Applying a 180° phase shifting and 14 power splitting to the output of the cascaded negators also results in four interference signals. The amplitudes of the eight signals are consistent. These signals to be interfered with are combined and input into four multiplexers to interfere. The interference results output by the four multiplexers correspond to the four kinds of symbols in the input QPSK optical signal. The center frequency of the four symbol interfered signals is 193.1THz.

NOT gates: The output signals of the multiplexers are amplified by 30.5dB using EDFAs, then input into the NOT gates ensure that the output signals of the NOT gates has a high extinction ratio. The CW in the NOT gate serves as the probing light, with center frequency at 193.4THz, inconsistent with the multiplexers' outputs, ensuring no interference occurs. The outputs of NOT gates all have a center frequency at 193.4THz. The outputs of the NOT1, NOT2, NOT3, NOT4 correspond to the positions of the four kinds of symbols in the input QPSK optical signal respectively. They were separately split through 14 power splitters, then input into 41 optical switches, making the four inputs of each switch correspond to the matching results of these four symbols {0}, {π2}, {π} and {3π2}, respectively.

41 optical switches: The 41 optical switches are controlled using two-bit high and low levels: {00}, {01}, {10}, {11}, corresponding to the four inputs of the 41 switch. Using optical delay lines to sequentially delay the outputs signals of the 41 optical switches by {(N1)T,(N2)T,,T,0} following the order of the symbols in the target sequence. Taking the all-optical matching system aimed at four-symbol target sequences as an example, four 41 optical switches are required. The outputs of the four 41 optical switches respectively pass through delays of 3T, 2T, 1T, and 0T.

Wavelength converters: The wavelengths of the symbol matching signals outputted by 41 optical switches are the same, while the AND gate used in the system requires that the wavelengths of two inputs are not identical for FWM to occur. Therefore, a wavelength conversion is necessary. The symbol matching signal is amplified to 50mW using an EDFA with a gain coefficient of 17dB, and then input to the fiber with a CW of 50mW at a different wavelength. The output of the OBPF is amplified to a proper power and then input into the AND gate.

AND gates: The power of the two input signals for the AND gate are kept at about 30mW and 9mW, respectively. Taking the first AND gate in the first layer as an example, the inputs are a symbol matching signal which is 30mW at 193.4THz, and another symbol matching signal which is 9mW at 193.7THz. The center frequency of the OBPF is set to 193.1THz, and the output signal represents the result of the AND logic operation. This output is amplified to the appropriate power by an EDFA and then input into the second layer AND gate. It is noteworthy that the AND gates used in the system do not have strict requirements for the power of the input signals, and correct AND logic operation can be achieved when the power is within a certain range. Therefore, the power of the input signals can be adjusted according to actual needs.

Output: The output of the last AND gate in the array is connected to a signal analyzer. Observing the optical power of each symbol, the positions of high-power optical pulses correspond to the positions of the last symbol of the target sequence in the data sequence. The number of high-power optical pulses indicates the number of the target sequence in the data sequence.

4. Results and discussion

4.1 Simulation results and analysis of matching

Based on the simulation platform designed in Section 3, the all-optical matching simulation test of 100 Gbaud QPSK signals was carried out. For the input QPSK optical signals, sequences of 16-symbol and 32-symbol were used as the data sequences. The matching results of the input QPSK optical signals to multiple 4-symbol target sequences and 8-symbol target sequences are simulated respectively.

Figure 13 first shows the symbols matching results of the system for the input QPSK optical signal which data sequence is {π2,π,3π2,π2,0,3π2,π,π,π2,3π2,π2,π,3π2,0,π2,π}, and the positions of these symbols are marked with red boxes. Figure 14(a) shows the matching process of the 16-symbol data sequence to the 4-symbol target sequence {π,3π2,0,π2}. The output of the AND1_1 of the first layer AND gates is {0,0,0,0,1,0,0,0,0,0,0,0,0,0,1,0}, and the number and position of the high-level pulses represent the number and position of the sequence {π,3π2,X,X} in the data sequence, where X means an arbitrary symbol. The output of the AND1_2 is {0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0}, and the number and position of high-level pulses represent the number and position of the sequence {X,X,0,π2} in the data sequence. The output of the AND2_1 is {0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0}, and the number and position of the high-level pulses represent the number and position of the target sequence {π,3π2,0,π2} in the data sequence. In the data sequence, there is one target sequence, and the last symbol of the target sequence corresponds to the 15th symbol in the data sequence, which has been marked with a red box in Fig. 14(a). Figure 15(a) shows the matching process of the 16-symbol data sequence to the 8-symbol sequence {π,π,π2,3π2,π2,π,3π2,0}. In the first layer, the output of the AND1_1 is {0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0}, and the number and position of the high-level pulses represent the number and position of the sequence {π,π,X,X,X,X,X,X} in the data sequence. The output of the AND1_2 is {0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0}, and the number and position of the high-level pulses represent the number and position of the sequence {X,X,π2,3π2,X,X,X,X} in the data sequence. The output of the AND1_3 is {0,0,0,1,0,0,0,0,0,0,0,0,0,1,0,0}, and the number and position of the high-level pulses represent the number and position of the sequence {X,X,X,X,π2,π,X,X} in the data sequence. The output of the AND1_4 is {0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0}, and the number and position of the high-level pulses represent the number and position of the sequence {X,X,X,X,X,X,3π2,0} in the data sequence. In the second layer AND gates, the output of the AND2_1 is {0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0}, and the number and position of the high-level pulses represent the number and position of the sequence {π,π,π2,3π2,X,X,X,X} in the data sequence. The output of the AND2_2 is {0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0}, and the number and position of the high-level pulses represent the number and position of the sequence {X,X,X,X,π2,π,3π2,0} in the data sequence. Finally, the output of the last gate AND3_1 is {0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0}, and the number and position of the high-level pulses represent the number and position of the 8-symbol target sequence {π,π,π2,3π2,π2,π,3π2,0} in the data sequence. In the data sequence, there is one target sequence, and the last symbol of the target sequence corresponds to the 14th symbol in the data sequence, which has been marked with a red box in Fig. 15(a). In addition, simulations were conducted on the input QPSK optical signal with a 32-symbol data sequence. Figure 14(b) shows the matching results of the 32-symbol data sequence to the 4-symbol target sequence {3π2,π2,0,π}. Figure 15(b) presents the matching results of the 32-symbol data sequence to the 8-symbol target sequence {π2,0,π,π,0,3π2,0,3π2}.

 figure: Fig. 13.

Fig. 13. The four symbols matching results of the data sequence {π2,π,3π2,π2,0,3π2,π,π,π2,3π2,π2,π,3π2,0,π2,π}.

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 figure: Fig. 14.

Fig. 14. The simulation results of matching 4-symbol target sequences, (a) The matching process of the 16-symbol data sequence to the 4-symbol target sequence {π,3π2,0,π2}, (b) The matching process of the 32-symbol data sequence to the 4-symbol target sequence {3π2,π2,0,π}.

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 figure: Fig. 15.

Fig. 15. The simulation results of matching 8-symbol target sequences, (a) The matching process of the 16-symbol data sequence to the 8-symbol target sequence {π,π,π2,3π2,π2,π,3π2,0}, (b) The matching process of the 32-symbol data sequence to the 8-symbol target sequence {π2,0,π,π,0,3π2,0,3π2}.

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The simulation results demonstrate that the proposed phase-locking-free all-optical matching system for QPSK optical signal, effectively achieves all-optical matching of the input QPSK optical signals without introducing local target sequence signals. The primary factors influencing the system’s complexity are the number of 41 optical switches and the complexity of the AND gates array, which are determined by the length of the target sequence. In this study, a two-input AND gate was utilized. Future research could potentially reduce system complexity by implementing multi-input AND gates.

4.2 Tolerance analysis

The simulations were conducted on the system’s tolerance to the lasers’ line width and the signal baud rate. In these simulations, data sequence is {π2,π,3π2,π2,0,3π2,π,π,π2,3π2,π2,π,3π2,0,π2,π}, and the target sequence is {π,3π2,0,π2}.

The line width of the laser has a significant impact on signal quality. When the line width of the lasers used in the system increases, it will lead to a decline in signal quality and affect the performance of equipment in the system. In the simulation in Section 4.1, we set the line width of the lasers to 100kHz, which is a relatively ideal parameter. To test the impact of line width on system performance, we conducted simulations under different line widths with other parameters fixed. Figure 16 shows a comparison of the matching results of the 16-symbol data sequence {π2,π,3π2,π2,0,3π2,π,π,π2,3π2,π2,π,3π2,0,π2,π} to the 4-symbol target sequence {π,3π2,0,π2} under different line widths. Under ideal conditions (line width is 100kHz), the correct output should only have a high level at the 15th symbol position. It can be found that as the line width increases from 100kHz to 50MHz, the power of the high level decreases. When the lasers’ line width set at 75MHz, the power at mismatched positions is higher than at matched positions, which means that the system outputs an incorrect result. This is because as the line width increases, the phase jitter of the input QPSK optical signal becomes too large, causing errors during phase processing and interference matching, ultimately leading to system failure. However, when line width set at 50MHz, the system can still match correctly, indicating that the system has a low requirement for line width. Therefore, our system has a wide tolerance for line width of lasers.

 figure: Fig. 16.

Fig. 16. The simulation results of the system when line width changes, (a) Line width is changed from 100 kHz to 75 MHz, (b) The error matching result at 75 MHz.

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We also tested the baud rate tolerance of the system. Without changing other parameters, only the baud rate of the input QPSK optical signal was varied to observe the output signals of the system under different baud rates. At the same time, the OBPFs' bandwidth (GHz) is set equal to the signal's baud rate (Gbaud) numerically. Figure 17 shows the outputs of our system under five baud rates: 99 Gbaud, 99.5 Gbaud, 100 Gbaud, 105 Gbaud, and 106 Gbaud. It can be found that when the baud rate of the QPSK signal is between 99.5 Gbaud and 105 Gbaud, the system can output correct matching results. However, since both the squarers and the negators are designed for 100 Gbaud, there will be errors in phase processing when the baud rate deviates by 100 Gbaud. It can be observed that when the baud rate of the input QPSK signal is 99.5 Gbaud and 105 Gbaud, although the waveforms are correct, the power of the high-level pulse drops to the hundreds of microwatts. When the baud rate of the input QPSK optical signal is 99 Gbaud and 106 Gbaud, due to excessive deviation, the system will output incorrect signals. The squarers, negators, and all-optical logic gates used in our system are implemented based on the nonlinear effects of HNLF. To perform the same operation on signals with different baud rates, different parameters of optical fibers are required to obtain the appropriate intensity of nonlinear effects. Especially for the squarers and negators involving phase changes, precise parameters are needed to achieve the functions of initial phase doubling and initial phase negation. Therefore, if all-optical matching at other baud rates is to be realized based on the proposed system, it requires a targeted redesign of the device parameters within the system.

 figure: Fig. 17.

Fig. 17. The simulation results of the system when baud rate changes.

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4.3 Challenges in reality

In the simulation, we successfully verified the function of the designed system. However, unlike the ideal environment of simulation software, there may be many challenges in real experimental verification, which need our attention.

  • • The baud rate of the input QPSK optical signal is 100 Gbaud. Currently, the generation and reception of 100 Gbaud QPSK signals remain a significant challenge and have not been widely implemented. Only a small number of top-tier laboratories have achieved this.
  • • The system has high precision requirements for each device, such as the delay module in the Target setting module. It requires a high degree of accuracy to ensure the correct implementation of AND logic operations.
  • • In simulation, we can directly observe the phase information of optical signals, which is impossible to do in practice. It leads to a high difficulty level in debugging actual systems.

 

5. Conclusion

The primary focus of this paper is the design of a phase-locking-free all-optical matching system for QPSK optical signal. Previously proposed all-optical matching systems for high-order phase modulation formats have encountered limitations in addressing phase synchronization. This issue necessitates complex phase-locking circuits to achieve phase synchronization between the local target sequence signal and the input signal, representing a significant challenge at present. The system designed in this paper circumvents this by performing phase preprocessing on the input QPSK optical signal without necessitating phase locking. It realizes the symbol matching of the input signal through self-interference matching of the processed signals, sets the target sequences via 41 optical switches, and outputs the final matching result through AND gates array.

The results derived from the simulation platform based on VPItransmissionMaker 8.5 substantiate the viability of the proposed system. The simulations successfully achieve precise detection and location of 4-symbol and 8-symbol target sequences in 16-symbol and 32-symbol data sequences. Future research should focus on further exploring the system’s anti-noise performance. Additionally, investigating strategies to reduce the complexity of modules such as AND gates array presents a promising avenue for development.

Funding

National Natural Science Foundation of China (62171050, 62125103, 61821001); Fundamental Research Funds for Central Universities (2023PY08); State Key Laboratory of Information Photonics and Optical Communications (IPOC2021ZT15).

Acknowledgments

We thank the National Natural Science Foundation of China (62171050, 62125103, 61821001), the Fundamental Research Funds for Central Universities (2023PY08), the State Key Laboratory of Information Photonics and Optical Communications (IPOC2021ZT15) for supporting this work.

Disclosures

The authors declare no conflicts of interest.

Data availability

Data underlying the results presented in this paper are not publicly available at this time but may be obtained from the authors upon reasonable request.

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