Contents
2024
Volume: 3 Issue 1
8 Article(s)
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Research Articles
Colloidal semiconductor nanocrystals for light emission and photonic integration
Huan Liu, Dabin Lin, Puning Wang, Tingchao He, and Rui Chen
Solution-processed colloidal semiconductor nanocrystals (NCs) have become attractive materials for the development of optoelectronic and photonic devices due to their inexpensive synthesis and excellent optical properties. Recently, CdSe NCs with different dimensions and structures have achieved significant progress inSolution-processed colloidal semiconductor nanocrystals (NCs) have become attractive materials for the development of optoelectronic and photonic devices due to their inexpensive synthesis and excellent optical properties. Recently, CdSe NCs with different dimensions and structures have achieved significant progress in photonic integrated circuits (PICs), including light generation (laser), guiding (waveguide), modulation, and detection on a chip. This article summarizes the development of CdSe NCs–based lasers and discusses the challenges and opportunities for the application of CdSe NCs in PICs. Firstly, an overview of the optical properties of CdSe-based NCs with different dimensions is presented, with emphasis on the amplified stimulated emission and laser properties. Then, the nanophotonic devices and PICs based on CdSe NCs are introduced and discussed. Finally, the prospects for PICs are addressed..
Chip
- Publication Date: Mar. 01, 2024
- Vol. 3, Issue 1, 100073 (2024)
Sensing with extended gate negative capacitance ferroelectric field-effect transistors
Honglei Xue, Yue Peng, Qiushi Jing, Jiuren Zhou... and Wangyang Fu|Show fewer author(s)
With major signal analytical elements situated away from the measurement environment, extended gate (EG) ion-sensitive field-effect transistors (ISFETs) offer prospects for whole chip circuit design and system integration of chemical sensors. In this work, a highly sensitive and power-efficient ISFET was proposed basedWith major signal analytical elements situated away from the measurement environment, extended gate (EG) ion-sensitive field-effect transistors (ISFETs) offer prospects for whole chip circuit design and system integration of chemical sensors. In this work, a highly sensitive and power-efficient ISFET was proposed based on a metal–ferroelectric–insulator gate stack with negative capacitance–induced super-steep subthreshold swing and ferroelectric memory function. Along with a remotely connected EG electrode, the architecture facilitates diverse sensing functions for future establishment of smart biochemical sensor platforms..
Chip
- Publication Date: Mar. 01, 2024
- Vol. 3, Issue 1, 100074 (2024)
Deterministic relation between thermal-phonon dressings and a non-Hermitian multi-Fano interferences router in ion-doped microcrystals
Huanrong Fan, Faizan Raza, Anas Mujahid, Peng Li... and Yanpeng Zhang|Show fewer author(s)
The multi-Fano interference, which is obtained through the simultaneous acquisition of bright and dark states in different phase transitions of Eu3+ : BiPO4 (7 : 1, 6 : 1, 1 : 1, and 0.5 : 1) and Eu3+ : NaYF4 (1 : 1/4) crystals, were reported in this work. Multidressed spontaneous four-wave mixing and multidressed fluoThe multi-Fano interference, which is obtained through the simultaneous acquisition of bright and dark states in different phase transitions of Eu3+ : BiPO4 (7 : 1, 6 : 1, 1 : 1, and 0.5 : 1) and Eu3+ : NaYF4 (1 : 1/4) crystals, were reported in this work. Multidressed spontaneous four-wave mixing and multidressed fluorescence (multiorder) were adopted to optimize the strong photon–phonon nested dressing effect, which results in more obvious multi-Fano interference. Firstly, the multi-Fano is produced through interference in continuous and multibound states. Secondly, five multi-Fano dips are originated from the nested five dressings (one photon and four phonons) under symmetrical splitting of 7F1 energy level. It is found that the pure H-phase (0.5 : 1) sample exhibits the strongest photon–phonon dressed effect (five Fano dips). Further, high-order non-Hermitian exceptional points in multi-Fano interference were investigated by adjusting the ratio of Rabi frequency to dephase rate through nested photon and phonon dressing. The experimental results are validated by theoretical simulations, which may be applied to designing optoelectronic devices such as non-Hermitian multi-Fano interferences (multichannel) router..
Chip
- Publication Date: Mar. 01, 2024
- Vol. 3, Issue 1, 100077 (2024)
Cooperative engineering the multiple radio-frequency fields to reduce the X-junction barrier for ion trap chips
Yarui Liu, Zhao Wang, Zixuan Xiang, Qikun Wang... and Xu Wang|Show fewer author(s)
With the increasing number of ion qubits and improving performance of sophisticated quantum algorithms, more and more scalable complex ion trap electrodes have been developed and integrated. Nonlinear ion shuttling operations at the junction are more frequently used, such as in the areas of separation, merging, and excWith the increasing number of ion qubits and improving performance of sophisticated quantum algorithms, more and more scalable complex ion trap electrodes have been developed and integrated. Nonlinear ion shuttling operations at the junction are more frequently used, such as in the areas of separation, merging, and exchanging. Several studies have been conducted to optimize the geometries of the radio-frequency (RF) electrodes to generate ideal trapping electric fields with a lower junction barrier and an even ion height of the RF saddle points. However, this iteration is time-consuming and commonly accompanied by complicated and sharp electrode geometry. Therefore, high-accuracy fabrication process and high electric breakdown voltage are essential. In the current work, an effective method was proposed to reduce the junction's pseudo-potential barrier and ion height variation by setting several individual RF electrodes and adjusting each RF voltage amplitude without changing the geometry of the electrode structure. The simulation results show that this method shows the same effect on engineering the trapping potential and reducing the potential barrier, but requires fewer parameters and optimization time. By combining this method with the geometrical shape-optimizing, the pseudo-potential barrier and the ion height variation near the junction can be further reduced. In addition, the geometry of the electrodes can be simplified to relax the fabrication precision and keep the ability to engineer the trapping electric field in real-time even after the fabrication of the electrodes, which provides a potential all-electric degree of freedom for the design and control of the two-dimensional ion crystals and investigation of their phase transition..
Chip
- Publication Date: Mar. 01, 2024
- Vol. 3, Issue 1, 100078 (2024)
A lateral AlGaN/GaN Schottky barrier diode with 0.36-V turn-on voltage and 10-kV breakdown voltage by using double-barrier anode structure
Ru Xu, Peng Chen, Xiancheng Liu, Jianguo Zhao... and Youdou Zheng|Show fewer author(s)
GaN power electronic devices, such as the lateral AlGaN/GaN Schottky barrier diode (SBD), have received significant attention in recent years. Many studies have focused on optimizing the breakdown voltage (BV) of the device, with a particular emphasis on achieving ultra-high-voltage (UHV, > 10 kV) applications. HoweGaN power electronic devices, such as the lateral AlGaN/GaN Schottky barrier diode (SBD), have received significant attention in recent years. Many studies have focused on optimizing the breakdown voltage (BV) of the device, with a particular emphasis on achieving ultra-high-voltage (UHV, > 10 kV) applications. However, another important question arises: can the device maintain a BV of 10 kV while having a low turn-on voltage (Von)? In this study, the fabrication of UHV AlGaN/GaN SBDs was demonstrated on sapphire with a BV exceeding 10 kV. Moreover, by utilizing a double-barrier anode (DBA) structure consisting of platinum (Pt) and tantalum (Ta), a remarkably low Von of 0.36 V was achieved. This achievement highlights the great potential of these devices for UHV applications..
Chip
- Publication Date: Mar. 01, 2024
- Vol. 3, Issue 1, 100079 (2024)
Wafer-scale synthesis of two-dimensional materials for integrated electronics
Zijia Liu, Xunguo Gong, Jinran Cheng, Lei Shao... and Jun He|Show fewer author(s)
Two-dimensional (2D) van der Waals materials have attracted great interest and facilitated the development of post-Moore electronics owing to their novel physical properties and high compatibility with traditional microfabrication techniques. Their wafer-scale synthesis has become a critical challenge for large-scale iTwo-dimensional (2D) van der Waals materials have attracted great interest and facilitated the development of post-Moore electronics owing to their novel physical properties and high compatibility with traditional microfabrication techniques. Their wafer-scale synthesis has become a critical challenge for large-scale integrated applications. Although the wafer-scale synthesis approaches for some 2D materials have been extensively explored, the preparation of high-quality thin films with well-controlled thickness remains a big challenge. This review focuses on the wafer-scale synthesis of 2D materials and their applications in integrated electronics. Firstly, several representative 2D layered materials including their crystal structures and unique electronic properties were introduced. Then, the current synthesis strategies of 2D layered materials at the wafer scale, which are divided into “top-down” and “bottom-up”, were reviewed in depth. Afterwards, the applications of 2D materials wafer in integrated electrical and optoelectronic devices were discussed. Finally, the current challenges and future prospects for 2D integrated electronics were presented. It is hoped that this review will provide comprehensive and insightful guidance for the development of wafer-scale 2D materials and their integrated applications..
Chip
- Publication Date: Mar. 01, 2024
- Vol. 3, Issue 1, 100080 (2024)
Solid-state quantum nodes based on color centers and rare-earth ions coupled with fiber Fabry–Pérot microcavities
Ruo-Ran Meng, Xiao Liu, Ming Jin, Zong-Quan Zhou... and Guang-Can Guo|Show fewer author(s)
High-performance optical quantum memories serving as quantum nodes are crucial for the distribution of remote entanglement and the construction of large-scale quantum networks. Notably, quantum systems based on single emitters can achieve deterministic spin–photon entanglement, which greatly simplifies the difficulty oHigh-performance optical quantum memories serving as quantum nodes are crucial for the distribution of remote entanglement and the construction of large-scale quantum networks. Notably, quantum systems based on single emitters can achieve deterministic spin–photon entanglement, which greatly simplifies the difficulty of constructing quantum network nodes. Among them, optically interfaced spins embedded in solid-state systems, as atomic-like emitters, are important candidate systems for implementing long-lived quantum memory due to their stable physical properties and robustness to decoherence in scalable and compact hardware. To enhance the strength of light-matter interactions, optical microcavities can be exploited as an important tool to generate high-quality spin–photon entanglement for scalable quantum networks. They can enhance the photon collection probability and photon generation rate of specific optical transitions and improve the coherence and spectral purity of emitted photons. For solid-state systems, open Fabry–Pérot cavities can couple single emitters that are not in proximity to the surface, avoiding significant spectral diffusion induced by the interfaces while maintaining the wide tunability, which enables addressing of multiple single emitters in the frequency and spatial domain within a single device. This review described the characteristics of single emitters as quantum memories with a comparison to atomic ensembles, the cavity-enhancement effect for single emitters and the advantages of different cavities, especially fiber Fabry–Pérot microcavities. Finally, recent experimental progress on solid-state single emitters coupled with fiber Fabry–Pérot microcavities was also reviewed, with a focus on color centers in diamond and silicon carbide, as well as rare-earth dopants..
Chip
- Publication Date: Mar. 01, 2024
- Vol. 3, Issue 1, 100081 (2024)
The future is frozen: cryogenic CMOS for high-performance computing
R. Saligram, A. Raychowdhury, and Suman Datta
Low temperature complementary metal oxide semiconductor (CMOS) or cryogenic CMOS is a promising avenue for the continuation of Moore's law while serving the needs of high performance computing. With temperature as a control “knob” to steepen the subthreshold slope behavior of CMOS devices, the supply voltage of opeLow temperature complementary metal oxide semiconductor (CMOS) or cryogenic CMOS is a promising avenue for the continuation of Moore's law while serving the needs of high performance computing. With temperature as a control “knob” to steepen the subthreshold slope behavior of CMOS devices, the supply voltage of operation can be reduced with no impact on operating speed. With the optimal threshold voltage engineering, the device ON current can be further enhanced, translating to higher performance. In this article, the experimentally calibrated data was adopted to tune the threshold voltage and investigated the power performance area of cryogenic CMOS at device, circuit and system level. We also presented results from measurement and analysis of functional memory chips fabricated in 28 nm bulk CMOS and 22 nm fully depleted silicon on insulator (FDSOI) operating at cryogenic temperature. Finally, the challenges and opportunities in the further development and deployment of such systems were discussed..
Chip
- Publication Date: Mar. 01, 2024
- Vol. 3, Issue 1, 100082 (2024)
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