So far SDRAM memory expansion is entirely dependent on the upgrade of semiconductor technology, and the speed-up is up to the clock utilization pattern.The speed of DDR3 SDRAM has been increased by a factor of 8, hence the further improvement is extremely difficult.A novel serial access SDDR memory structure and on-chip serial only write bus are presented in this paper, encapsulating the DDR memory into components connected by message, packaging such information of the accessed memory as command, address and data and so forth into message packet and exchanging information through on-chip serial only write bus and component-based DDR memory.SDDR memory reduces the number of pins, has simple connection, high anti-interference ability and reliability, and is easy for expansion and improving the clock rate further.Therefore, it has obvious practical prospects.