In order to achieve real-time imaging and simultaneous display, a lary array CMOS camera system with simple structure and portable size is designed. Making use of EPF10K50, image timing of MT9M413C36STM, display timing of SXGA and multiplex of output data are designed. Image sensor data is divided into two way signals. One way data outputs for processor electric circuit to deal with, the other way data through ADV7127 video AD transformation outputs to display simultaneity in SXGA. The related hardware electric circuit is designed, and the device driver is written using the VHDL language. Under the development environment of the Quartus 8.0, it is debugged. Experimental results show that this system can stably work in 1 280×1 024@60 Hz line-by-line scan.