Fig. 1. Diagram illustrating the photonic transceiver architecture of the system.

Fig. 2. Single-channel, discrete component 10G link performance. (a) Simulated link performance comparison of idealized (blue) and realistic (red) optical links. (b) The yellow region is where the BCH(511, 484) FEC code can be used to correct for all errors, the green region is FEC-free, and the red region exhibits too many errors to be adequately corrected. (c) Simulated FEC performance with simple algebraic decoder compared with binomial approximation.

Fig. 3. FEC latency with 20× interleaving of 511-bit blocks streamed through a single-wavelength channel operating at 26.4 Gbps.

Fig. 4. FEC latency with 20× interleaving across 20 wavelengths and 26-way time-domain interleaving of 511-bit blocks.

Fig. 5. (a) Light-current output and wall plug efficiency of a QD-MLL. (b) Optical spectrum and (c) wall plug efficiency of generating the 20th comb line assuming 20 comb lines are used for data transmission. (d) Comparison of the measured RIN for different comb lines versus the entire spectrum. (e) Comb state and RIN at 10 GHz for different comb lines in a QD-MLL spectrum; colored spectra correspond to bandpassed individual comb lines measured in (d).

Fig. 6. (a) 300 mm wafer of silicon photonic transceivers. (b) Micrograph of a silicon photonic 1 Tbps transceiver PIC.

Fig. 7. (a) Low-loss edge coupler concept and micrograph with silicon substrate etch. (b) Measured transmission of edge coupler to SMF-28 fiber.

Fig. 8. (a) Insertion losses of the silicon photonic polarization beam splitter and rotator. (b) Measurement of polarization crosstalk for each path when the undesired input polarization is excited. (c) Micrograph of PSR test structure.

Fig. 9. (a) Transmission spectrum of a ring modulator. (b) Transmission spectrum as input power to ring is increased. (c) Transmission as integrated phase shifter is reverse biased. (d) Measured electro-optic S21 magnitude with the carrier +32  GHz detuned from resonance.

Fig. 10. (a) Resonance location of different ring odd-deinterleaved channels on a bus. One line of 10 points is a single reticle’s bus of rings, showing strong correlation between different channels. The line may be broken into two segments if the Channel 1 resonance did not occur near 1297 nm. (b) Wafer map of the number of rings that can be tuned to the correct channel on each reticle. The maximum value is 10. (c) Micrograph of a ring modulator test structure.

Fig. 11. (a) Measured spectral response of RX ring drop and add ports. (b) Backscatter spectrum estimate from the drop and add responses. (c) Micrograph of RX ring test structure for backscatter measurement.

Fig. 12. (a) Measured I-V curve and optical attenuation of the variable optical attenuator. (b) Measurement of clock signal using the VOA from 0 V to 0.8 V. (c) EO bandwidth measurement of the VOA. (d) Micrograph of 1 Tbps PIC with segment of VOA shown in red box (d).

Fig. 13. (a) Bandwidth measurement of the receiver photodetector. Inset shows the responsivity. (b) Wafer-scale measurement of receiver dark current at 1 V reverse bias in nA. (c) Micrograph of photodiode test structure.

Fig. 14. (a) Schematic of control IC chip. (b) Schematic of the photocurrent sensing ADC.

Fig. 15. Overall architecture of the driver IC.

Fig. 16. (a) Cross-section diagram for a 1 Tbps system. (b) Daughter card printed circuit board for 1 Tbps system. (c) Cross-section diagram of simplified 25 Gbps system package.

Fig. 17. (a) Doped silicon TSVs with BCB gap fill prior to backside substrate release. (b) Ohmic contacts to the TSVs. (c) Interposer with embedded driver IC. (d) Multiple redistribution layers on BCB.

Fig. 18. (a) PIC pads that bond to the driver IC after plating and singulation. (b) PIC optical facet for fiber coupling after facet polishing. (c) An assembled 25 Gbps package.

Fig. 19. (a) FAU attach hardware secured to a daughter card. (b) Insertion loss through FAU and PIC alignment loopback across wavelength and temperature.

Fig. 20. (a) Ring modulator fiber coupled and DC needle probed on its p-n junction phase shifter and its monitor photodiode. (b) Packaged control IC chip. (c) Ring frequency response shifting according to the applied bias voltage change from the control IC. (d) Scanning a ring modulator resonance by stepping the EO phase shifter bias and reading its monitor photocurrent both with the control IC. (e) Locking a laser that begins on the red side of a ring resonance to a particular photocurrent on the blue side of the resonance. Blue and red regions in (d) and (e) indicate whether the laser is on the blue or red side of the ring’s resonance, respectively.

Fig. 21. Link experiments and resultant eye diagrams. Boxed elements indicate variations from the original experimental setup in (a), and elements within a box with a green border represent integrated components. (b) Modification of the original experiment where a single QD-MLL carrier is filtered out of the comb and passed through the ring modulator. (c) Recreating the single-carrier experiment with a laser capable of higher power at the same carrier conditions as prior experiment. (d) Increasing the input power of the single carrier experiment.

Fig. 22. Energy budget extrapolations for a 1 Tbps system utilizing a QD-SOA.