In order to configure the LED display control system dynamically and flexibly to satisfy different displaying requirements, we propose a new field-programmable gate array (FPGA) system structure, which achieves the 2048 pixel×32 pixel point to point addressing with minimal hardware resources based on the principle of two level caching and addressing code. Following the principle of gray controlling with high priority, we generate the control signal under the precondition of ensuring the display performance by taking 250 MHz high frequency as basic clock, associating with the synchronize control module. Experimental results verify that the display control system with the proposed FPGA frame could drive different resolutions, different scanning modes and different LED panels successfully. It improves the compatibility and flexibility of LED display control system.