• Semiconductor Optoelectronics
  • Vol. 44, Issue 4, 606 (2024)
LIU Dan, WU Liying, SHEN Yunliang, ZHANG Wenhao..., LIU Min, QUAN Xueling and CHENG Xiulan|Show fewer author(s)
Author Affiliations
  • Center for Advanced Electronic Materials and Devices, School of Electronic Information and Electrical Engineering, Shanghai Jiaotong University, Shanghai 200240, CHN
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    DOI: 10.16818/j.issn1001-5868.2024021901 Cite this Article
    LIU Dan, WU Liying, SHEN Yunliang, ZHANG Wenhao, LIU Min, QUAN Xueling, CHENG Xiulan. Research on the Tapered Sidewall Etching of Quartz Based on Photoresist Modification Technology[J]. Semiconductor Optoelectronics, 2024, 44(4): 606 Copy Citation Text show less
    References

    [2] Bliznetsov V, Li B, Lee J W, et al. Plasma etching of SiO2 with tapered sidewall for thin film encapsulation[C]// 2016 IEEE 18th Electronics Packaging Technology Conference (EPTC), 2016: 688-690.

    [3] Sharma J, Lee J W, Merugu S, et al. A robust bilayer cap in thin film encapsulation for MEMS device application[J]. IEEE Trans. Compon. Packag. Manuf. Technol., 2015, 5(7): 930-937.

    [4] Pornin J L, Gillot C, Parat G, et al. Wafer level thin film encapsulation for BAW RF MEMS[C]// 2007 Proceedings 57th Electronic Components and Technology Conference, 2007: 605-609.

    [7] Erdenebat M U, Piao Y L, Darkhanbaatar N, et al. Advanced mobile three-dimensional display based on computer-generated integral imaging[J]. Proc. SPIE, 2018, 10679: 104-113.

    [8] White L K, Meyerhofer D. Tapered resist wall profiles by flood exposure[J]. J. Electrochem. Soc., 1987, 134(12): 3125.

    [9] Ponoth S S, Agarwal N T, Persans P D, et al. Fabrication of micromirrors with self-aligned metallization using silicon back-end-of-the-line processes[J]. Thin Solid Films, 2005, 472(1/2): 169-179.

    [10] Ohiwa T, Horioka K, Arikado T, et al. SiO2 tapered etching employing magnetron discharge of fluorocarbon gas[J]. Jpn. J. Appl. Phys., 1992, 31(2R): 405.

    [11] Kim J-w, Kim J, Kim J-h. Interconnecting method for semiconductor device: U.S. Patent 5,591,675[P]. 1997-1-7.

    [12] Stinnett J A, Brooks C B, Merry W R, et al. Oxide plasma etching process with a controlled wineglass shape: U.S. Patent 6,355,557[P]. 2002-3-12.

    [14] Oehrlein G S, Kurogi Y. Sidewall surface chemistry in directional etching processes[J]. Mater. Sci. Eng.: R: Rep., 1998, 24(4): 153-183.

    [15] Matsuo S. Selective etching of SiO2 relative to Si by plasma reactive sputter etching[J]. J. Vac. Sci. Technol., 1980, 17(2): 587-594.

    [16] Schaepkens M, Oehrlein G S. A review of SiO2 etching studies in inductively coupled fluorocarbon plasmas[J]. J. Electrochem. Soc., 2001, 148(3): C211.

    LIU Dan, WU Liying, SHEN Yunliang, ZHANG Wenhao, LIU Min, QUAN Xueling, CHENG Xiulan. Research on the Tapered Sidewall Etching of Quartz Based on Photoresist Modification Technology[J]. Semiconductor Optoelectronics, 2024, 44(4): 606
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