A low-power, high-performance gate voltage bootstrap sampling switch circuit was designed in TSMC 40 nm/0.9 V CMOS process for the application of audio signal sampling. The average power consumption of the overall switch circuit was greatly reduced by a novel shorting-connection topology of bulk-drain of PMOS transistor instead of a clock amplifier module. An NMOS transistor was specifically added to the input terminal and turned on/off along with the switched clock, so the switching linearity could be effectively improved and benefited from the suppressing of the body effect of the core sampling transistor. A sine wave signal, which was 19.53 kHz frequency and 0.3 V amplitude as a simulated audio signal was input into the proposed switching circuit, and then a high-speed data sampling simulation with a 10 MHz sampling frequency was carried out. Compared with the traditional switch circuit structure, four dynamic performance indexes in terms of the effective number of bit (ENOB), signal-to-noise ratio (SNR), spurious-free dynamic range (SFDR) and total harmonic distortion (THD) are improved by 5.5%, 3.7%, 13.8% and 5.4%, respectively. Meanwhile, the power consumption is reduced by 36.8%.