A new output harmonic control structure was adopted for solving the influence of transistor parasitic parameters on the efficiency of the inverse class F (F-1) power amplifier. Firstly, the second and third harmonic control circuits were designed, and the direct current bias circuit was added into the second harmonic control circuit, which reduced the complexity of circuit design. Secondly, in order to solve the influence of parasitic parameters on the intrinsic drain impedance of class F-1 power amplifier, a serial microstrip line was used for parasitic compensation. Finally, the fundamental wave and load were matched through microstrip lines and capacitors. In order to verify the effectiveness of the method, a 0.25 μm gallium nitride high electron mobility (GaN HEMT) transistor technology was adopted to design an class F-1 Monolithic Microwave Integrated Circuit (MMIC) power amplifier working at 5.7 GHz~6.3 GHz. The post-layout simulation results show that the drain efficiency (DE) and power added efficiency (PAE) of class F-1 power amplifier are 57.2%~62.3% and 51.8%~57.4%, respectively. The saturated output power is 39.0 dBm~40.4 dBm, the gain is 9.0 dBm~10.4 dBm, and the layout area is 3.2×1.7 mm2.