Traditional terahertz frequency doublers often utilize hybrid integrated circuits as implementation methods, leading to issues such as large size, high packaging loss, and poor stability. By employing an active device based on indium phosphide (InP) High Electron Mobility Transistors (HEMT) with a gate length of 2×25 μm, a fully monolithic integrated D-band frequency doubler is designed by using a combined simulation analysis method of Advanced Design System (ADS) and electromagnetic (EM) simulation. The frequency doubler is designed in the form of frequency doubling plus amplification, with the first stage being a frequency doubling circuit and the second stage using an amplification circuit. Within the range of 132~154 GHz, when the input power is 4.5 dBm, the output power is greater than 6 dBm, the fundamental wave suppression ratio is better than 31 dBc, the third harmonic suppression ratio is better than 36 dBc, and the maximum output power is 9 dBm@144 GHz, with a corresponding frequency conversion gain of 4.5 dB. The chip area of this frequency doubler is approximately 3.1 mm×1.3 mm. This design provides a new option for fully monolithic integrated terahertz sources and the realization of miniaturized terahertz sources.